This invention relates to frequency detecting circuitry and to systems employing these type of circuits.
In communication systems, data signals transmitted at a predetermined rate (frequency) by a transmitter are intended to be received by a receiver which has to process the received data signals. To properly process the received data signals, the receiver synchronizes the frequency of the output signal of a voltage controlled oscillator (VCO) to the rate (frequency) of received data signals. The initial frequency of operation of the VCO, which is designed to be close to, and within, a defined capture range of the transmitted/received data rate, is set by a receiver oscillator, the so-called local oscillator, producing a reference frequency (fref). Once the frequency of operation of the VCO is within the xe2x80x9ccapture rangexe2x80x9d it can be used to lock onto the frequency of the received data signals. After lock, or synchronization, is achieved, the VCO output is used to xe2x80x9cclockxe2x80x9d the received data signals to produce xe2x80x9cRetimed Dataxe2x80x9d signals which can then be properly processed by the receiver.
As noted above, the local oscillator sets the initial frequency of operation of the VCO which is compared with the data rate (frequency) of the received data signals. However, for the VCO to lock-in onto the frequency of the received data signals the control exercised by the local oscillator must be reduced or eliminated. Doing so effectively is not an easy matter. In some prior art systems the local oscillator is disconnected from the VCO prior to the receipt of data signals. However, a problem exists in these prior art systems in that the frequency of operation of the VCO may have drifted or shifted out of the xe2x80x9ccapture rangexe2x80x9d by the time data signals are received. To avoid this problem other prior art systems maintain the local oscillator connected to the VCO until and while the data signals are received. However, a problem with these other prior art systems is that the VCO may remain locked in onto the frequency of the local oscillator rather than locking in on the frequency (rate) of the data signals. Alternatively, the VCO is caused to switch back and forth between the local oscillator and the data signals resulting in phase shifting and jitter in the VCO output, whereby the clocking signal is not clean and reliable.
Applicant""s invention resides in a novel frequency detector and in frequency tuning systems employing the novel frequency detector.
A frequency detector embodying the invention includes circuitry for comparing first and second signals having first and second frequencies, respectively, and for producing an output signal indicative of the difference between the two signals only when their frequency difference is greater than a predetermined value. When their frequency difference is less than the predetermined value the frequency detector output has a prescribed output that indicates this relative sameness. When this condition occurs, the detector is said to be within a so-called xe2x80x9cdead zonexe2x80x9d, because the value of the output is not responsive to ensuing changes in the inputs until the frequency difference exceeds the predetermined value. A frequency detector embodying the invention may be used in conjunction with a VCO such that, in response to a local oscillator, the frequency detector causes the frequency of the VCO to be within a predetermined range. However, the frequency detector of the invention exercises little, if any, control over the operation of the VCO while the frequency of the VCO is within the predetermined range.
In one embodiment of the invention, the first signal is a reference signal, the second signal is a clock signal and the frequency detector produces an output having: (a) a first value when the frequency of the reference signal is greater than the frequency of the clock signal by a predetermined amount; (b) a second value when the frequency of the reference signal is less than the frequency of the clock signal by a given amount; and (c) a third value when the frequency of the reference and clock signals are within a predetermined frequency range of each other defined as the xe2x80x9cdead zonexe2x80x9d.
In a system embodying the invention, the output of a frequency detector embodying the invention is supplied to a voltage control network coupled to a voltage controlled oscillator (VCO) for controlling the amplitude of a control voltage (Vc) applied to the VCO; where the VCO has an output at which is produced a clock signal (Ck) whose frequency is proportional to the amplitude of Vc. A reference frequency signal (fref) and the clock signal, Ck, are applied to the input of the frequency detector which then functions to maintain the frequency of Ck within a predetermined frequency range.
In a particular embodiment of the invention, the system embodying the invention further includes a phase detector circuit having an input to which is applied the clock signal, Ck, and a received data input signal having a frequency (rate) determined by a data signal transmitter. The phase detector is responsive to its input signals and produces an output indicative of their phase difference, which output is also applied to the voltage controlled network. In this embodiment the phase detector controls and locks the clock signal to a frequency corresponding to the rate of the data input signals when the data rate is within the predetermined frequency range, without interference from the frequency detector.